Flip chip technology is one of the fastest growing segments of electronic packaging with growth being driven by the demands such as cost reduction, increase of input/output density, package size reduction and higher operating speed requirements. Unfortunately, flip chip package design has a significant drawback related to the mismatch of coefficient of thermal expansion (CTE) between the silicon die and the organic substrate, which leads to premature failures of the package. Package reliability can be improved by the application of an underfill. In this paper, we report the development of novel underfill materials utilizing nano-filler technology, which provides a previously unobtainable balance of low CTE and good solder joint formation.

Issue Section:
Research Papers
Keywords:
silicon compounds, flip-chip devices, resins, integrated circuit packaging, integrated circuit reliability, integrated circuit interconnections, nanotechnology, soldering, thermal expansion
Topics:
Fillers (Materials), Flip-chip devices, Flow (Dynamics), Reliability, Resins, Semiconductor wafers, Flip-chip, Thermal expansion, Epoxy resins, Solder joints, Solders, Manufacturing
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